The present invention relates to liquid crystal display (LCD) devices and, more particularly, to a novel metallization system for the scan and data lines which address each pixel (picture element) of the pixel array making up the LCD.
A liquid crystal display (LCD) device typically comprises a pair of flat panels (usually a glass substrate and a cover glass) sealably containing a quantity of liquid crystal material, such as a dichroic dye guest/host system or a twisted nematic formulation. One of the flat panels will usually have conductive material disposed on, and substantially completely covering, an inner surface to form a "ground plane" electrode. A plurality of electrodes, formed from a transparent conductive material such as indium tin oxide (ITO), will be disposed on the opposite panel and will usually be arranged in uniform columns and rows to form an X-Y matrix structure. These electrodes are generally referred to as "pixel" electrodes. Thus, in a LCD device a typical cell or pixel includes liquid crystal material disposed between a pixel electrode and a ground electrode, which effectively forms a capacitor disposed between the two flat panels. If the LCD device is to operate by reflected light, as in a digital watch or calculator display, only the opposite panel (on which the ITO electrodes are disposed) need be transparent; the other panel will be formed with a reflective surface If the LCD device is to be light transmissive, then both flat panels should be transparent and the ground plane electrode should also be formed from a transparent material (such as ITO and the like).
A semiconductor switch, such as a thin-film field-effect transistor (FET) and the like, is integrally formed with each pixel to control operation of that pixel in the display. FETs are preferred in LCDs because of their potentially small size, low power consumption, favorable switching speeds, ease of fabrication, and compatibility with conventional LCD structures.
Electrical communication with the individual pixel FETs is accomplished by a plurality of X-address lines or scan lines, typically one for each row (or column) of pixels, and a plurality of Y-address lines or data lines, one for each column (or row) of pixels. The scan lines are usually connected to the gate electrodes of the pixel FETs and the data lines are usually connected to the source electrodes. The drain electrode of each FET is connected to the pixel electrode. An individual pixel may be addressed by applying a voltage of sufficient magnitude to one of the scan lines to cause the FETs in the row corresponding to the scan line to "switch-on" to a conducting state. If a data voltage is applied to a data line while an FET in the column corresponding to the data line is in an "on" state, the pixel capacitor will charge and store the data voltage after the scan line voltage has decreased to a level sufficient to turn-off the FET. Each pixel in the display may be individually addressed in this manner. Depending upon the magnitude of the data voltage applied to the pixel electrode, the optical properties of the liquid crystal material are altered. The data voltage magnitude may be such as to: allow no light transmission through the pixel (off); allow maximum light transmission through the pixel (on); or provide an intermediate gray scale level of light transmission.
The charge on the pixel capacitor may be refreshed or updated at video rates, preferably about every 10.sup.-3 seconds or less, to maintain the image on the LCD device and prevent flickering of the display. Thus, in a large matrix display having about 600.times.600 pixels, a scan line voltage is applied for only a few microseconds and the scan line, in combination with the corresponding pixels of that scan line row, must attain and hold the desired potential in that time period. Additionally, the data line voltage is also only applied for a few microseconds and during this time the pixel capacitor must also charge and maintain the desired data line potential. The ability of each individual scan and data line with the corresponding pixel to attain and hold the desired potential during this short time period is limited by the RC time constant of the line. Therefore, it is important that the line resistance be as low as possible. Having the lowest possible scan and data line resistance possible will become even more critical as LCD devices increase in size and resolution because the scan and data lines will become longer with more pixels connected to each line.
Currently, titanium is used extensively for the scan lines and FET gates of LCD devices; titanium etches well and exhibits good adhesion characteristics to the underlying LCD substrate and to subsequently deposited layers, but has a high bulk resistivity (42 .mu.ohms-cm). Some practitioners in the art have used materials such as chromium, tantalum, molybdenum and aluminum, but these metals all present certain disadvantages. Chromium, tantalum and molybdenum may require special processing procedures which are compatible with their use. Additionally, chromium and tantalum have bulk resistivities of 13 .mu.ohm-cm and 12.5 .mu.ohm-cm, respectively; molybdenum has a low bulk resistivity (5.2 .mu.ohm-cm) but exhibits poor adhesion characteristics to the underlying LCD substrate and to the overlying insulation layer. Aluminum also has a lowbbulk resistivity (2.65 .mu.ohm-cm) but chemically reacts when exposed to an ionic solution, such as photoresist stripper R10 and the like, which can corrode and dissolve the aluminum. Additionally, address lines fabricated from only aluminum cannot be laser welded to make repairs if any of the lines are open or shorted.
It is accordingly a primary object of the present invention to provide a novel scan and data address line metallization system which is not subject to the foregoing disadvantages.
It is another object of the present invention to provide scan and data address line structures which provide refreshing of the pixels at standard video rates.
It is a further object of the present invention to provide scan and data address line structures which have low RC time constants and which are compatible with currently practiced fabrication procedures.
These and other objects of the invention, together with the features and advantages thereof, will become apparent from the following detailed specification when read with the accompanying drawings in which like reference numerals refer to like elements.